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PDF INTEL 80386 PROGRAMMERS REFERENCE MANUAL 1986

─────────────────────────────────────────────────────────────────────────── Customer Support is Intel\'s complete support service that provides Intel customers with hardware support software support customer training and consulting services For more information contact your local sales offices After a customer purchases any system hardware or s

PDF Intel 8086 Family Users Manual October 1979

Title: Intel 8086 Family User\'s Manual October 1979 Author: INTEL Keywords: Intel 8086 8088 8089 microprocessor Created Date: 5/8/2009 5:36:54 PM

PDF 8086 FAMILY UTILITIES USERS GUIDE

This manual describes and shows how to use the LINK86 LOC86 LIB86 and OH86 commands that support 8086 program development These commands run under Version 3 4 and later versions of ISIS-II

PDF 8086 Microprocessor Kit Users Manual

The 8086 Microprocessor Kit is a single board computer designed for self-learning the 16-bit microprocessor operations The CPU is 8086 with 16-bit memory interface The monitor ROM provides functions for entering 8086 instruction code using onboard hex key testing code running single stepping and display user registers

  • When was the 8086 family user's manual published?

    Intel 8086 Family User's Manual October 1979 Author INTEL Keywords Intel 8086 8088 8089 microprocessor Created Date 5/8/2009 5:36:54 PM

  • How to enter 8086 instructions using hex code or machine code?

    Let us try enter 8086 instructions using HEX CODE or machine code. Our test program has only three instructions. Load AL register with the 8-bit constant, 01. This instruction has two bytes hex code i.e., B0, and 01. B0 is instruction MOV AL,n and 01 is n. OUT 0,AL Copy AL register to output port, gpio1 LED at location 00.

  • What is a typical 8086 & 80286 configuration?

    For example, typical 8086 and 80286 configurations lock the entire physical memory space. The area of memory defined by the destination operand is guaranteed to be locked against access by a processor executing a locked instruction on exactly the same memory area, i.e., an operand with identical starting address and identical length.

  • What is 8086 microprocessor kit?

    The 8086 Microprocessor Kit is a single board computer designed for self-learning the 16-bit microprocessor operations. The CPU is 8086 with 16-bit memory interface. The monitor ROM provides functions for entering 8086 instruction code using onboard hex key, testing code running, single stepping and display user registers.

Customer Support

─────────────────────────────────────────────────────────────────────────── Customer Support is Intel's complete support service that provides Intel customers with hardware support, software support, customer training, and consulting services. For more information contact your local sales offices. After a customer purchases any system hardware or s

1.1.1 Part I ── Applications Programming

This part presents those aspects of the architecture that are customarily used by applications programmers. Chapter 2 ── Basic Programming Model: Introduces the models of memory organization. Defines the data types. Presents the register set used by applications. Introduces the stack. Explains string operations. Defines the parts of an instruction

1.1.4 Part IV ── Instruction Set

Parts I, II, and III present overviews of the instructions as they relate to specific aspects of the architecture, but this part presents the instructions in alphabetical order, providing the detail needed by assembly-language programmers and programmers of debuggers, compilers, operating systems, etc. Instruction descriptions include algorithmic d

1.1.5 Appendices

The appendices present tables of encodings and other details in a format designed for quick reference by assembly-language and systems programmers. css.csail.mit.edu

WORD ╔╤╤╤╤╤╤╤╤╤╤╤╤╤╤╤╗ ║│ │ ║ ORDINAL ║ │ ║ INTEGER ║│ │ │ │ ║

╚╧══════╝ SIGN BIT┘└──────┘ MAGNITUDE ╚═══════╝ ╚╧══════╧═══════╝ css.csail.mit.edu

2.3.4.1 Status Flags

The status flags of the EFLAGS register allow the results of one instruction to influence later instructions. The arithmetic instructions use OF, SF, ZF, AF, PF, and CF. The SCAS (Scan String), CMPS (Compare String), and LOOP instructions use ZF to signal that their operations are complete. There are instructions to set, clear, and complement CF be

3.1.1 General-Purpose Data Movement Instructions

MOV (Move) transfers a byte, word, or doubleword from the source operand to the destination operand. The MOV instruction is useful for transferring data along any of these paths. There are also variants of MOV that operate on segment registers. These are covered in a later section of this chapter.: To a register from memory To memory from a regi

╠═══════╪═══════╣◄──ESP ╠═══════╪═══════╣

I A ║ ║ O N ╠═══════╪═══════╣ N S ║ ║ I ╠═══════╪═══════╣ │ O ║ ║ │ N ╠═══════╪═══════╣ │ ║ ║ ▼ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ · · ║ EAX ║ ╠═══════╪═══════╣ ║ ECX ║ ╠═══════╪═══════╣ ║ EDX ║ ╠════

╠═══════╪═══════╣◄──ESP

║ ║ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ ╠═══════╪═══════╣ ║ ║ css.csail.mit.edu

║S║S S S S S S S S S S S S S S S S N N N N N N N N N N N N N N N║

╚═╩═════════════╪═══════════════╪═══════════════╪═══════════════╝ css.csail.mit.edu

3.2.2 Comparison and Sign Change Instruction

CMP (Compare) subtracts the source operand from the destination operand. It updates OF, SF, ZF, AF, PF, and CF but does not alter the source and destination operands. A subsequent Jcc or SETcc instruction can test the appropriate flags. NEG (Negate) subtracts a signed integer operand from zero. The effect of NEG is to reverse the sign of the operan

3.3 Decimal Arithmetic Instructions

Decimal arithmetic is performed by combining the binary arithmetic instructions (already discussed in the prior section) with the decimal arithmetic instructions. The decimal arithmetic instructions are used in one of the following ways: To adjust the results of a previous binary arithmetic operation to produce a valid packed or unpacked decim

3.3.1 Packed BCD Adjustment Instructions

DAA (Decimal Adjust after Addition) adjusts the result of adding two valid packed decimal operands in AL. DAA must always follow the addition of two pairs of packed decimal numbers (one digit in each half-byte) to obtain a pair of valid packed decimal digits as results. The carry flag is set if carry was needed. DAS (Decimal Adjust after Subtractio

3.3.2 Unpacked BCD Adjustment Instructions

AAA (ASCII Adjust after Addition) changes the contents of register AL to a valid unpacked decimal number, and zeros the top 4 bits. AAA must always follow the addition of two unpacked decimal operands in AL. The carry flag is set and AH is incremented if a carry is necessary. AAS (ASCII Adjust after Subtraction) changes the contents of register AL

3.4 Logical Instructions

The group of logical instructions includes: The Boolean operation instructions Bit test and modify instructions Bit scan instructions Rotate and shift instructions Byte set on condition css.csail.mit.edu

3.4.1 Boolean Operation Instructions

The logical operations are AND, OR, XOR, and NOT. NOT (Not) inverts the bits in the specified operand to form a one's complement of the operand. The NOT instruction is a unary operation that uses a single operand in a register or memory. NOT has no effect on the flags. The AND, OR, and XOR instructions perform the standard logical operations "and",

3.4.4 Shift and Rotate Instructions

The shift and rotate instructions reposition the bits within the specified operand. These instructions fall into the following classes: Shift instructions Double shift instructions Rotate instructions css.csail.mit.edu

3.4.4.1 Shift Instructions

The bits in bytes, words, and doublewords may be shifted arithmetically or logically. Depending on the value of a specified count, bits can be shifted up to 31 places. A shift instruction can specify the count in one of three ways. One form of shift instruction implicitly specifies the count as a single shift. The second form specifies the count as

3.4.4.3 Rotate Instructions

Rotate instructions allow bits in bytes, words, and doublewords to be rotated. Bits rotated out of an operand are not lost as in a shift, but are "circled" back into the other "end" of the operand. Rotates affect only the carry and overflow flags. CF may act as an extension of the operand in two of the rotate instructions, allowing a bit to be isol

3.4.6 Test Instruction

TEST (Test) performs the logical "and" of the two operands, clears OF and CF, leaves AF undefined, and updates SF, ZF, and PF. The flags can be tested by conditional control transfer instructions or by the byte-set-on-condition instructions. The operands may be doublewords, words, or bytes. The difference between TEST and AND is that TEST does not

3.5.1.1 Jump Instruction

JMP (Jump) unconditionally transfers control to the target location. JMP is a one-way transfer of execution; it does not save a return address on the stack. The JMP instruction always performs the same basic function of transferring control from the current location to a new location. Its implementation varies depending on whether the address is sp

3.5.1.3 Return and Return-From-Interrupt Instruction

RET (Return From Procedure) terminates the execution of a procedure and transfers control through a back-link on the stack to the program that originally invoked the procedure. RET restores the value of EIP that was saved on the stack by the previous CALL instruction. RET instructions may optionally specify an immediate operand. By adding this cons

3.5.2 Conditional Transfer Instructions

The conditional transfer instructions are jumps that may or may not transfer control, depending on the state of the CPU flags when the instruction executes. css.csail.mit.edu

3.5.2.3 Executing a Loop or Repeat Zero Times

JCXZ (Jump if ECX Zero) branches to the label specified in the instruction if it finds a value of zero in ECX. JCXZ is useful in combination with the LOOP instruction and with the string scan and compare instructions, all of which decrement ECX. Sometimes, it is desirable to design a loop that executes zero times if the count variable in ECX is ini

── Direction flag

Control flag instructions: CLD STD css.csail.mit.edu

3.6.1 Repeat Prefixes

The repeat prefixes REP (Repeat While ECX Not Zero), REPE/REPZ (Repeat While Equal/Zero), and REPNE/REPNZ (Repeat While Not Equal/Not Zero) specify repeated operation of a string primitive. This form of iteration allows the CPU to process strings much faster than would be possible with a regular software loop. When a primitive string operation has

3.6.2 Indexing and Direction Flag Control

The "Flags Affected" section lists the flags that are affected by the instruction, as follows: If a flag is always cleared or always set by the instruction, the value is given (0 or 1) after the flag name. Arithmetic and logical instructions usually assign values to the status flags in the uniform manner described in Appendix C. Noncon

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